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SRAM
Austin Semiconductor, Inc. 64K x 4 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY SPECIFICATIONS
* SMD 5962-89524 * MIL-STD-883
MT5C2565
PIN ASSIGNMENT (Top View)
FEATURES
High Speed: 12, 15, 20, 25, 35, and 45ns Battery Backup: 2V data retention Low power standby High-performance, low-power, CMOS double-metal process * Single +5V (+10%) Power Supply * Easy memory expansion with CE\ * All inputs and outputs are TTL compatible * * * *
NC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 CE\ OE\ Vss
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
Vcc A15 A14 A13 A12 A11 A10 NC NC DQ4 DQ3 DQ2 DQ1 WE\
A1 A0 NC Vcc NC 3 2 1 28 27 A2 4 A3 5 A4 6 A5 7 A6 8 A7 9 A8 1 0 A9 1 1 CE\ 1 2 13 14 15 16 17 DQ1 WE\ NC Vss OE\
26 25 24 23 22 21 20 19 18
28-Pin DIP (C) (300 MIL)
28-Pin LCC (EC)
A15 A14 A13 A12 A11 A10 DQ4 DQ3 DQ2
OPTIONS
* Timing 15ns access 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access * Package(s) Ceramic DIP (300 mil) Ceramic LCC
MARKING
-15 -20 -25 -35 -45 -55* -70*
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs high-speed, low-power CMOS designs using a four-transistor memory cell. Austin Semiconductor SRAMs are fabricated using double-layer metal, double-layer polysilicon technology. For flexibility in high-speed memory applications, Austin Semiconductor offers chip enable (CE\) and output enable (OE\) capability. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW. Reading is accomplished when WE\ remains HIGH and CE\ and OE\ go LOW. The device offers a reduced power standby mode when disabled. This allows system designs to achieve low standby power requirements. The "L" version provides an approximate 50 percent reduction in CMOS standby current (ISBC2) over the standard version. All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible.
C EC
No.108 No. 204
* Operating Temperature Ranges Industrial (-40oC to +85oC) IT Military (-55oC to +125oC) XT * 2V data retention/low power L
*Electrical characteristics identical to those provided for the 45ns access devices.
For more products and information please visit our web site at www.austinsemiconductor.com
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
SRAM
Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM
VCC GND
MT5C2565
A12 A11 A11 A10
A8 A3 A2 A1 A0
A8 A3 A2 A1 A0
262,144-BIT MEMORY ARRAY
I/O CONTROL
A10 A12
ROW DECODER
DQ4
DQ1
(LSB) (LCC) COLUMN DECODER (LSB) OE\ WE\ POWER DOWN CE\
A7
A6
A5
A4
A9
A15
A14
A13
TRUTH TABLE
MODE STANDBY READ READ WRITE OE\ X L H X CE\ H L L L WE\ X H H L DQ HIGH-Z Q HIGH-Z D POWER STANDBY ACTIVE ACTIVE ACTIVE
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
SRAM
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Vss..................................-0.5V to +7V Voltage on Vcc Supply Relative to Vss.............................-0.5V to +7V Storage Temperature......................................................-65oC to +150oC Power Dissipation..............................................................................1W Short Circuit Output Current.........................................................50mA Lead Temperature (soldering 10 seconds)....................................+260oC Junction Temperature..................................................................+175oC
MT5C2565
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TC < 125oC; VCC = 5V +10%)
DESCRIPTION Input High (Logic 1) Voltage Input Low (Logic 0) Voltage Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage
CONDITIONS
SYM VIH VIL
MIN 2.2 -0.5 -10 -10 2.4
MAX VCC+0.5 0.8 10 10
UNITS V V A A V
NOTES 1 1, 2
0VILI ILO VOH VOL
1 1
0.4
MAX -25 120
V
PARAMETER Power Supply Current: Operating Power Supply Current: Standby
CONDITIONS CE\ < VIL; VCC = MAX f = MAX = 1/tRC (MIN) Output Open CE\ = 2.4V, OE\ = 2.4V, VCC = MAX, f = 0 Hz CE\ > VCC -0.3V; VCC = MAX VIL < VSS +0.2V VIH > VCC -0.2V; f = 0 Hz "L" Version Only
SYM Icc
-15 160
-20 150
-35 120
-45 120
UNITS NOTES mA 3
ISBT2
40
40
20
20
20
mA
ISBC2 ISBC2
20 10
20 10
10 10
10 10
10 10
mA mA
CAPACITANCE
DESCRIPTION Input Capacitance Output Capacitance CONDITIONS TA = 25 C, f = 1MHz VCC = 5V
o
SYM CI CO
MAX 11 11
UNITS pF pF
NOTES 4 4
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
SRAM
Austin Semiconductor, Inc.
MT5C2565
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC; VCC = 5V +10%)
DESCRIPTION READ CYCLE READ cycle time Address access time Chip Enable access time Output hold from address change Chip Enable to output in Low-Z Chip disable to output in High-Z Output Enable access time Output Enable to output in Low-Z Output disable to output in High-Z WRITE CYCLE WRITE cycle time Chip Enable to end of write Address valid to end of write Address setup time Address hold from end of write WRITE pulse width Data setup time Data hold time Write disable to output in Low-Z Write Enable to output in High-Z -15 -20 -25 -35 -45 SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES tRC tAA tACE tOH tLZCE tHZCE tAOE tLZOE tHZOE tWC tCW tAW tAS tAH tWP tDS tDH tLZWE tHZWE 15 15 15 3 3 8 8 0 9 15 10 10 0 0 10 9 0 0 7 20 15 15 0 0 15 10 0 0 10 0 9 25 20 20 0 0 20 15 0 0 15 3 3 10 10 0 15 35 25 25 0 0 25 20 0 0 15 20 20 20 3 3 15 15 0 20 45 30 30 0 0 30 20 0 0 20 25 25 25 3 3 15 25 0 20 ns ns ns ns ns ns ns ns ns ns 35 35 35 3 3 20 30 45 45 45 ns ns ns ns ns ns ns ns
7 6, 7 4 4
7 6, 7
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
SRAM
Austin Semiconductor, Inc.
+5V AC TEST CONDITIONS
Input pulse levels ...................................... Vss to 3.0V Input rise and fall times ......................................... 5ns Input timing reference levels ................................ 1.5V Output reference levels ....................................... 1.5V Output load ................................. See Figures 1 and 2
MT5C2565
+5V 480 480 Q 255 5 pF
Q 255 30pF
Fig. 1 Output Load Equivalent
Fig. 2 Output Load Equivalent
NOTES
1. 2. 3. All voltages referenced to VSS (GND). -3V for pulse width < 20ns ICC is dependent on output loading and cycle rates. The specified value applies with the outputs unloaded, and f = 1 Hz. t RC (MIN) 4. This parameter is guaranteed but not tested. 5. Test conditions as specified with the output loading as shown in Fig. 1 unless otherwise noted. 6. tHZCE, tHZOE and tHZWE are specified with CL = 5pF as in Fig. 2. Transition is measured 500mV typical from steady state voltage, allowing for actual tester RC time constant.
At any given temperature and voltage condition, tHZCE is less than tLZCE, and tHZWE is less than tLZWE and tHZOE is less than tLZOE. 8. WE\ is HIGH for READ cycle. 9. Device is continuously selected. Chip enable is held in its active state. 10. Address valid prior to, or coincident with, latest occurring chip enable. 11. tRC = Read Cycle Time. 12. Chip enable (CE\) and write enable (WE\) can initiate and terminate a WRITE cycle.
7.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION VCC for Retention Data Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time
*for -25 and slower only
CONDITIONS CE\ > (VCC - 0.2V) VIN > (VCC - 0.2V) or < 0.2V VCC = 2V
SYM VDR ICCDR tCDR tR
MIN 2
MAX --1
UNITS V mA ns ns
NOTES
*
4 4, 11
0 tRC
---
LOW Vcc DATA RETENTION WAVEFORM
VCC
t CDR DATA RETENTION MODE 4.5V VDR > 2V 4.5V tR V DR
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
4321 4321 4321 4321
321 321 321 321
CE\
VIH VIL
2365 4365 87 4365 21214321 87 41214321 21214321 87 21214321 4365 87
87654321 4321 321 87654321 4321 87654321 87654321 321
DON'T CARE UNDEFINED
SRAM
Austin Semiconductor, Inc.
MT5C2565
READ CYCLE NO. 1
t RC
8, 9
ADDR
t OH
VALID
t AA
Q
PREVIOUS DATA VALID
READ CYCLE NO. 2 CE\
t AOE tRC
OE\
tLZOE
tACE
DQ
HIGH-Z
t PU
Icc
MT5C2565 Rev. 1.5 1/01
4421 321 21 21 44321 3321 44321 321 21
tLZCE
44321 321 21 43211 332 421 21 21 44321
6
DATA VALID
7, 8, 10
tHZOE
tHZCE
DATA VALID
t PD
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
SRAM
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1 12 (Chip Enabled Controlled)
WC tWC
MT5C2565
t
ADDRESS
tAW tAW tAS tAS
CE\ WE\
tCW tCW t WP tWP1 tDS tDS
AH tAH
t
D Q
DATA VAILD
HIGH Z
WRITE CYCLE NO. 2 7, 12 (Write Enabled Controlled)
tWC tWC
ADDRESS
tAW tAW tCW tCW t AH tAH
CE\
tAS tAS
t WP tWP1 tDS t DH tDH
WE\
Q
HIGH-Z
DON'T CARE UNDEFINED
NOTE: Output enable (OE\) is inactive (HIGH).
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
6 231 1 1543422 2 1 65432321 4111 1 65434111 431 2 1 15432321 6 222
432 4321 4321 1 4321
321 321 321
436543210987654321 1 2 432543210987654321 111 611 432543210987654321 1 6 211 436543210987654321 111
D
tHZWE
DATA VALID
321098765432109876543211 1 2 32109876543210987654321 1 32109876543210987654321
0987654321210987654321098765432109876543221 1 1 1 098765432121098765432109876543210987654321
DH tDH
1 109876543210987654321 1 1 109876543210987654321 987654321 987654321 987654321 116543210987654321 27 1 2765432109876543 1 21 1 276543210987654321 2
t
tLZWE
SRAM
Austin Semiconductor, Inc. MECHANICAL DEFINITIONS*
ASI Case #108 (Package Designator C) SMD #5962-89524, Case Outline X
MT5C2565
D S2 A Q L Pin 1 S1 E e b b2
NOTE
0o to 15o
c eA
SYMBOL A b b2 c D E eA e L Q S1 S2
SMD SPECIFICATIONS MIN MAX --0.225 0.014 0.026 0.045 0.065 0.008 0.018 --1.485 0.240 0.310 0.300 BSC 0.100 BSC 0.125 0.200 0.015 0.070 0.005 --0.005 ---
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
*All measurements are in inches.
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
SRAM
Austin Semiconductor, Inc. MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC) SMD# 5962-88681, Case Outline X
D1 B2 D2 L2
MT5C2565
E3
E
e E1 E2
h x 45o D hx45 o L B1 D3 A1 A
SYMBOL A A1 B1 B2 D D1 D2 D3 E E1 E2 E3 e h L L2
SMD SPECIFICATIONS MIN MAX 0.060 0.120 0.050 0.088 0.022 0.028 0.072 REF 0.342 0.358 0.200 BSC 0.100 BSC --0.358 0.540 0.560 0.400 BSC 0.200 BSC --0.558 0.050 BSC 0.040 REF 0.045 0.055 0.075 0.095
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits.
*All measurements are in inches.
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
SRAM
Austin Semiconductor, Inc.
MT5C2565
ORDERING INFORMATION
EXAMPLE: MT5C2565C-20L/IT
Device Number MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 Package Speed Options** Process Type ns C C C C C C C -15 -20 -25 -35 -45 -55 -70 L L L L L L L /* /* /* /* /* /* /*
EXAMPLE: MT5C2565EC-45/XT
Device Number MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 MT5C2565 Package Speed Options** Process Type ns EC EC EC EC EC EC EC -15 -20 -25 -35 -45 -55 -70 L L L L L L L /* /* /* /* /* /* /*
*AVAILABLE PROCESSES IT = Industrial Temperature Range XT = Extended Temperature Range 883C = Full Military Processing ** OPTIONS L = 2V Data Retention/Low Power
-40oC to +85oC -55oC to +125oC -55oC to +125oC
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
SRAM
Austin Semiconductor, Inc.
MT5C2565
ASI TO DSCC PART NUMBER CROSS REFERENCE*
ASI Package Designator C
ASI Part # MT5C2565C-15/883C MT5C2565C-20/883C MT5C2565C-25/883C MT5C2565C-35/883C MT5C2565C-45/883C MT5C2565C-55/883C MT5C2565C-70/883C SMD Part # 5962-8952407XX 5962-8952406XX 5962-8952405XX 5962-8952404XX 5962-8952403XX 5962-8952402XX 5962-8952401XX
ASI Package Designator EC
ASI Part # MT5C2565EC-15/883C MT5C2565EC-20/883C MT5C2565EC-25/883C MT5C2565EC-35/883C MT5C2565EC-45/883C MT5C2565EC-55/883C MT5C2565EC-70/883C SMD Part # 5962-8952407YX 5962-8952406YX 5962-8952405YX 5962-8952404YX 5962-8952403YX 5962-8952402YX 5962-8952401YX
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
MT5C2565 Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11

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